As is known, electronic memory devices using a single power supply, such as Flash Electrically Erasable Programmable Read-Only Memories (EEPROMs) having a 3 Volt main power supply, require positive voltages higher that the main power supply for the reading, writing and erasing phases. These devices also require negative voltages less than the ground voltage reference for the reading and erasing phases. Voltage multipliers or charge pump circuits are widely used in these semiconductor electronic devices to internally generate voltage supplies whose values are higher or less than a main power supply and many prior art approaches are known for charge pump circuits providing the above required voltage values.
However, generating the positive or negative increased voltage value is not enough to guarantee correct operation of the memory device, since many operating phases require a specific voltage value which must be obtained from the increased voltage. For instance, during the reading, erasing and programming phases of different pages of a non-volatile memory array, many different negative voltage values would be required to drive properly a final decoder stage of each memory page. To generate and supply these negative voltage values to the different memory pages have up to now, required complex regulating circuits which occupy a large semiconductor area of the integrated circuit memory. Moreover, such regulating circuits limit the performance of the memory device to being slow in switching among the different voltage values. In other words, means for selectively generating within a Flash EEPROM device a predetermined number of negative voltages, starting from a single voltage value, while desirable, is not currently available in an efficient manner.